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Knowledge Base

Detecting and Using CPU Features in Applications (1005763)

Last Updated: 12/8/2010Categories: How toTotal Views: 19298Language:
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Details

CPU vendors, such as Intel and AMD, are continuously incorporating new features across their x86 processor families. These features vary between manufacturers, between CPU families from the same manufacturer, and even within individual CPU families. To determine the exact set of features supported by a processor, CPU vendors provide a CPUID instruction. Applications can execute this instruction and use the resulting feature bits to determine support for a particular feature.

Because CPU features vary between revisions, using CPU manufacturer, family, model, or stepping information as an indicator of support for a CPU feature is inaccurate and incorrect. It is also incorrect to simply assume the existence of CPU features. Applications using such incorrect methods might receive exceptions or other unexpected results. Such unexpected results are possible during execution on native hardware as well as on virtual machines.

Applications using such incorrect methods of feature detection can be classified as ill-behaved applications. For an application to be well-behaved, it must use the CPU vendor recommendations on feature detection.

Solution

Recommendations for Detecting CPU Features

Before an application can use a specific CPU feature, it must detect that the CPU is capable of that feature. CPU vendors recommend the following sequence of actions to detect a CPU feature:

Applications should use relevant CPUID feature flags to detect the existence of a feature. (See references 1 and 2 below for more information.)

(Optional) The application should then issue at least one instruction from that feature set to check that the OS has enabled this feature. This step may be performed in the try block of a try...catch statement (or similar).

Step 2 is optional, but is recommended.

Enhanced vMotion Compatibility (EVC) and CPU Features

EVC allows users to create a cluster with varied CPU models from the same vendor. EVC configures these CPUs to ensure that all CPUs within such a cluster are vMotion compatible. To facilitate this, CPUs with Intel VT FlexMigration and AMD-V Extended Migration modify the results reported by the the CPUID instruction. Because well-behaved applications always rely on the results of the CPUID instruction, only they can fully benefit from the EVC feature. Ill-behaved applications that use other methods of feature detection will not benefit from this feature and might become unstable or even fail on systems that use the EVC feature. Note that such behavior is possible on native hardware as well. In general, it is important that applications be well-behaved for stability. In particular, it is important that applications running in a guest OS be well-behaved to use the EVC feature in VMware ESX/ESXi.

Pseudocode Example

The following sample pseudocode sequence shows how well-behaved applications should detect a CPU feature SSE41:

/* cpuid_level_sse41 is 0x01 for SSE41. It could be 0x8000_00001 for other features */

/* cpuid_feature_regs contains all register values when the CPUID instruction is executed at cpuid_level_sse41 */

/* reg_ecx is the register used for the SSE41 feature. It could be reg_edx for other features */

/* cpuid_feature_bitmask_sse41 is a mask with bits for the SSE4.1 feature set, 0x00080000 in this case */

test_for_feature_sse41 () {

cpuid_feature_regs = execute_cpuid_for_level(cpuid_level_for_sse41);

if (cpuid_feature_regs.reg_ecx & cpuid_feature_bitmask_sse41) {

/* CPUID feature flag for 'SSE41' set */

try {

/* __execute_opcode_from_feature_sse41__, say PMULLD */

} catch (error) {

/* opcode cannot be executed */

return false;

}

/ * Both feature flags and opcode execute pass */

return true;

}

return false;

}

VMware EVC Support

Applications that do not follow CPU vendor recommended methods of feature detection might behave unexpectedly in an EVC environment. VMware EVC cannot be supported with ill-behaved applications that do not follow the CPU vendor recommendations listed in this article.

References

Intel 64 and IA-32 Architectures Software Developer's Manual Volume 2A: Instruction Set Reference, A-M. Order #253666-026US, February 2008

AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions. Publication #24594, September 2007

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