test: jnsnrtc.h Source File

Main Page | Class Hierarchy | Class List | File List | Class Members | File Members

# jnsnrtc.h

Go to the documentation of this file.

    00001 /*++
    00002
    00003 Copyright (c) 1991  Microsoft Corporation
    00004 Copyright (c) 1992  Digital Equipment Corporation
    00005
    00006 Module Name:
    00007
    00008     jnsnrtc.h
    00009
    00010 Abstract:
    00011
    00012     This module is the header file that describes hardware structure
    00013     for the Toy clock in the 82C106 combo chip on Jensen
    00014
    00015 Author:
    00016
    00017     David N. Cutler (davec) 3-May-1991
    00018     Jeff McLeman  (mcleman) 4-Jun-1992
    00019
    00020 Revision History:
    00021
    00022     13-Jul-1992 Jeff McLeman
    00023      Add port offsets for use with VTI access routines.
    00024
    00025     4-Jun-1992  Jeff McLeman
    00026      Adapt module to Jensen specific
    00027
    00028 --*/
    00029
    00030 #ifndef _JNSNRTC_
    00031 #define _JNSNRTC_
    00032
    00033 //
    00034 // Define Realtime Clock register numbers.
    00035 //
    00036
    00037 #define RTC_SECOND 0                    // second of minute [0..59]
    00038 #define RTC_SECOND_ALARM 1              // seconds to alarm
    00039 #define RTC_MINUTE 2                    // minute of hour [0..59]
    00040 #define RTC_MINUTE_ALARM 3              // minutes to alarm
    00041 #define RTC_HOUR 4                      // hour of day [0..23]
    00042 #define RTC_HOUR_ALARM 5                // hours to alarm
    00043 #define RTC_DAY_OF_WEEK 6               // day of week [1..7]
    00044 #define RTC_DAY_OF_MONTH 7              // day of month [1..31]
    00045 #define RTC_MONTH 8                     // month of year [1..12]
    00046 #define RTC_YEAR 9                      // year [00..99]
    00047 #define RTC_CONTROL_REGISTERA 10        // control register A
    00048 #define RTC_CONTROL_REGISTERB 11        // control register B
    00049 #define RTC_CONTROL_REGISTERC 12        // control register C
    00050 #define RTC_CONTROL_REGISTERD 13        // control register D
    00051
    00052 //
    00053 // The RTC NVRAM byte addresses are 0x0e -- 0x4f.
    00054 //
    00055 // Addresses 0x0E -- 0x3F are reserved for use by VMS/OSF.
    00056 //
    00057
    00058 #define RTC_RAM_NT_FLAGS0 0x40          // NT firmware flag set #0
    00059 #define RTC_RAM_CONSOLE_SELECTION 0x4f  // VMS/OSF/NT boot selection
    00060
    00061
    00062 //
    00063 // Define port registers for access with the VTI access
    00064 // routines
    00065 //
    00066
    00067 #define RTC_APORT     0x170
    00068 #define RTC_DPORT     0x171
    00069
    00070
    00071 #ifndef _LANGUAGE_ASSEMBLY
    00072
    00073 //
    00074 // Define Control Register A structure.
    00075 //
    00076
    00077 typedef struct _RTC_CONTROL_REGISTER_A {
    00078     UCHAR RateSelect : 4;
    00079     UCHAR TimebaseDivisor : 3;
    00080     UCHAR UpdateInProgress : 1;
    00081 } RTC_CONTROL_REGISTER_A, *PRTC_CONTROL_REGISTER_A;
    00082
    00083 //
    00084 // Define Control Register B structure.
    00085 //
    00086
    00087 typedef struct _RTC_CONTROL_REGISTER_B {
    00088     UCHAR DayLightSavingsEnable : 1;
    00089     UCHAR HoursFormat : 1;
    00090     UCHAR DataMode : 1;
    00091     UCHAR SquareWaveEnable : 1;
    00092     UCHAR UpdateInterruptEnable : 1;
    00093     UCHAR AlarmInterruptEnable : 1;
    00094     UCHAR TimerInterruptEnable : 1;
    00095     UCHAR SetTime : 1;
    00096 } RTC_CONTROL_REGISTER_B, *PRTC_CONTROL_REGISTER_B;
    00097
    00098 //
    00099 // Define Control Register C structure.
    00100 //
    00101
    00102 typedef struct _RTC_CONTROL_REGISTER_C {
    00103     UCHAR Fill : 4;
    00104     UCHAR UpdateInterruptFlag : 1;
    00105     UCHAR AlarmInterruptFlag : 1;
    00106     UCHAR TimeInterruptFlag : 1;
    00107     UCHAR InterruptRequest : 1;
    00108 } RTC_CONTROL_REGISTER_C, *PRTC_CONTROL_REGISTER_C;
    00109
    00110 //
    00111 // Define Control Register D structure.
    00112 //
    00113
    00114 typedef struct _RTC_CONTROL_REGISTER_D {
    00115     UCHAR Fill : 7;
    00116     UCHAR ValidTime : 1;
    00117 } RTC_CONTROL_REGISTER_D, *PRTC_CONTROL_REGISTER_D;
    00118
    00119 //
    00120 // Definitions for NT area of NVRAM
    00121 //
    00122
    00123 typedef struct _RTC_RAM_NT_FLAGS_0 {
    00124     UCHAR Fill : 7;
    00125     UCHAR AutoRunECU : 1;
    00126 } RTC_RAM_NT_FLAGS_0, *PRTC_RAM_NT_FLAGS_0;
    00127
    00128
    00129 #endif //_LANGUAGE_ASSEMBLY
    00130
    00131 // Values for RTC_RAM_CONSOLE_SELECTION
    00132 #define RTC_RAM_CONSOLE_SELECTION_NT    1
    00133 #define RTC_RAM_CONSOLE_SELECTION_VMS   2
    00134 #define RTC_RAM_CONSOLE_SELECTION_OSF   3
    00135
    00136 //
    00137 // Define initialization values for Jensen interval timer
    00138 // There are four different rates that are used under NT
    00139 // (see page 9-8 of KN121 System Module Programmer's Reference)
    00140 //
    00141 //   .976562 ms
    00142 //  1.953125 ms
    00143 //  3.90625  ms
    00144 //  7.8125   ms
    00145 //
    00146 #define RTC_RATE_SELECT1    6
    00147 #define RTC_RATE_SELECT2    7
    00148 #define RTC_RATE_SELECT3    8
    00149 #define RTC_RATE_SELECT4    9
    00150
    00151 //
    00152 // note that rates 1-3 have some rounding error,
    00153 // since they are not expressible in even 100ns units
    00154 //
    00155
    00156 #define RTC_PERIOD_IN_CLUNKS1   9766
    00157 #define RTC_PERIOD_IN_CLUNKS2  19531
    00158 #define RTC_PERIOD_IN_CLUNKS3  39063
    00159 #define RTC_PERIOD_IN_CLUNKS4  78125
    00160
    00161 //
    00162 // Defaults
    00163 //
    00164 #define MINIMUM_INCREMENT RTC_PERIOD_IN_CLUNKS1
    00165 #define MAXIMUM_INCREMENT RTC_PERIOD_IN_CLUNKS4
    00166 #define MAXIMUM_RATE_SELECT RTC_RATE_SELECT4
    00167
    00168 #endif // _JNSNRTC_
    00169